| 2011 |
|---|
| 17 | Adaptive Cache Design to Enable Reliable Low-Voltage Operation. Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Wei Wu, Shih-Lien Lu. IEEE Trans. Computers (60): 50-63 (2011). Web SearchBibTeXDownload |
| 16 | Energy-efficient cache design using variable-strength error-correcting codes. Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu. ISCA 2011, 461-472. Web SearchBibTeXDownload |
| 2010 |
|---|
| 15 | Reducing cache power with low-cost, multi-bit error-correcting codes. Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu. ISCA 2010, 83-93. Web SearchBibTeXDownload |
| 2009 |
|---|
| 14 | Trading Off Cache Capacity for Low-Voltage Operation. Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu. IEEE Micro (29): 96-103 (2009). Web SearchBibTeXDownload |
| 13 | Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors. Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson. IEEE Trans. VLSI Syst. (17): 1679-1690 (2009). Web SearchBibTeXDownload |
| 12 | Improving cache lifetime reliability at ultra-low voltages. Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu, Shih-Lien Lu. MICRO 2009, 89-99. Web SearchBibTeXDownload |
| 2008 |
|---|
| 11 | Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu. ISCA 2008, 203-214. Web SearchBibTeXDownload |
| 2007 |
|---|
| 10 | Interactions Between Compression and Prefetching in Chip Multiprocessors. Alaa R. Alameldeen, David A. Wood. HPCA 2007, 228-239. Web SearchBibTeXDownload |
| 9 | Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors. Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson. ISLPED 2007, 50-55. Web SearchBibTeXDownload |
| 2006 |
|---|
| 8 | IPC Considered Harmful for Multiprocessor Workloads. Alaa R. Alameldeen, David A. Wood. IEEE Micro (26): 8-17 (2006). Web SearchBibTeXDownload |
| 2005 |
|---|
| 7 | Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset. Milo M. K. Martin, Daniel J. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, David A. Wood. SIGARCH Computer Architecture News (33): 92-99 (2005). Web SearchBibTeXDownload |
| 2004 |
|---|
| 6 | Adaptive Cache Compression for High-Performance Processors. Alaa R. Alameldeen, David A. Wood. ISCA 2004, 212-223. Web SearchBibTeXDownload |
| 2003 |
|---|
| 5 | Variability in Architectural Simulations of Multi-Threaded Workloads. Alaa R. Alameldeen, David A. Wood. HPCA 2003, 7-18. Web SearchBibTeXDownload |
| 4 | Simulating a $2M Commercial Server on a $2K PC. Alaa R. Alameldeen, Milo M. K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Mark D. Hill, David A. Wood, Daniel J. Sorin. IEEE Computer (36): 50-57 (2003). Web SearchBibTeXDownload |
| 3 | Addressing Workload Variability in Architectural Simulations. Alaa R. Alameldeen, David A. Wood. IEEE Micro (23): 94-98 (2003). Web SearchBibTeXDownload |
| 2001 |
|---|
| 2 | Estimating the Selectivity of XML Path Expressions for Internet Scale Applications. Ashraf Aboulnaga, Alaa R. Alameldeen, Jeffrey F. Naughton. VLDB 2001, 591-600. Cited by 173Web SearchBibTeXDownload |
| 2000 |
|---|
| 1 | Timestamp snooping: an approach for extending SMPs. Milo M. K. Martin, Daniel J. Sorin, Anastassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, David A. Wood. ASPLOS 2000, 25-36. Cited by 36Web SearchBibTeXDownload |
