Christopher J. Hughes

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2011
18LIME: a framework for debugging load imbalance in multi-threaded execution. Jungju Oh, Christopher J. Hughes, Guru Venkataramani, Milos Prvulovic. ICSE 2011, 201-210. Web SearchBibTeXDownload
17Moguls: a model to explore the memory hierarchy for bandwidth improvements. Guangyu Sun, Christopher J. Hughes, Changkyu Kim, Jishen Zhao, Cong Xu, Yuan Xie, Yen-Kuang Chen. ISCA 2011, 377-388. Web SearchBibTeXDownload
16DeFT: Design space exploration for on-the-fly detection of coherence misses. Guru Venkataramani, Christopher J. Hughes, Sanjeev Kumar, Milos Prvulovic. TACO (8): 8 (2011). Web SearchBibTeXDownload
2010
15Performance and Energy Implications of Many-Core Caches for Throughput Computing. Christopher J. Hughes, Changkyu Kim, Yen-Kuang Chen. IEEE Micro (30): 25-35 (2010). Web SearchBibTeXDownload
2008
14Atomic Vector Operations on Chip Multiprocessors. Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Changkyu Kim, Victor W. Lee, Anthony D. Nguyen. ISCA 2008, 441-452. Web SearchBibTeXDownload
2007
13Computer Vision on Multi-Core Processors: Articulated Body Tracking. Trista Pei-chun Chen, Dmitry Budnikov, Christopher J. Hughes, Yen-Kuang Chen. ICME 2007, 1862-1865. Web SearchBibTeXDownload
12Carbon: architectural support for fine-grained parallelism on chip multiprocessors. Sanjeev Kumar, Christopher J. Hughes, Anthony D. Nguyen. ISCA 2007, 162-173. Web SearchBibTeXDownload
11Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors. Christopher J. Hughes, Radek Grzeszczuk, Eftychios Sifakis, Daehyun Kim, Sanjeev Kumar, Andrew Selle, Jatin Chhugani, Matthew J. Holliman, Yen-Kuang Chen. ISCA 2007, 220-231. Web SearchBibTeXDownload
2006
10Incremental approximate matrix factorization for speeding up support vector machines. Gang Wu, Edward Y. Chang, Yen-Kuang Chen, Christopher J. Hughes. KDD 2006, 760-766. Web SearchBibTeXDownload
9Hybrid transactional memory. Sanjeev Kumar, Alexandra Fedorova, Yossi Lev, Partha Kundu, Anthony D. Nguyen, Daniel Nussbaum. PPOPP 2006, 209-220. Web SearchBibTeXDownload
2005
8Memory-side prefetching for linked data structures for processor-in-memory systems. Christopher J. Hughes, Sarita V. Adve. J. Parallel Distrib. Comput. (65): 448-463 (2005). Web SearchBibTeXDownload
2004
7A Formal Approach to Frequent Energy Adaptations for Multimedia Applications. Christopher J. Hughes, Sarita V. Adve. ISCA 2004, 138-149. Web SearchBibTeXDownload
2002
6Joint local and global hardware adaptations for energy. Ruchira Sasanka, Christopher J. Hughes, Sarita V. Adve. ASPLOS 2002, 144-155. Web SearchBibTeXDownload
5RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve. IEEE Computer (35): 40-49 (2002). Web SearchBibTeXDownload
4Soft Real- Time Scheduling on Simultaneous Multithreaded Processors. Rohit Jain, Christopher J. Hughes, Sarita V. Adve. IEEE Real-Time Systems Symposium 2002, 134. Web SearchBibTeXDownload
2001
3Variability in the execution of multimedia applications and implications for architecture. Christopher J. Hughes, Praful Kaul, Sarita V. Adve, Rohit Jain, Chanik Park, Jayanth Srinivasan. ISCA 2001, 254-265. Web SearchBibTeXDownload
2Speculative precomputation: long-range prefetching of delinquent loads. Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen. ISCA 2001, 14-25. Web SearchBibTeXDownload
1Saving energy with architectural and frequency adaptations for multimedia applications. Christopher J. Hughes, Jayanth Srinivasan, Sarita V. Adve. MICRO 2001, 250-261. Web SearchBibTeXDownload
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