| 2006 |
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| 11 | Reduce Register Files Leakage Through Discharging Cells. Lingling Jin, Wei Wu, Jun Yang, Chuanjun Zhang, Youtao Zhang. ICCD 2006. Web SearchBibTeXDownload |
| 2005 |
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| 10 | A highly configurable cache for low energy embedded systems. Chuanjun Zhang, Frank Vahid, Walid A. Najjar. ACM Trans. Embedded Comput. Syst. (4): 363-387 (2005). Web SearchBibTeXDownload |
| 9 | Dynamic Co-allocation of Level One Caches. Lingling Jin, Wei Wu, Jun Yang, Chuanjun Zhang, Youtao Zhang. ICESS 2005, 373-385. Web SearchBibTeXDownload |
| 8 | A way-halting cache for low-energy high-performance systems. Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar. TACO (2): 34-54 (2005). Cited by 37Web SearchBibTeXDownload |
| 2004 |
|---|
| 7 | Frequent value encoding for low power data buses. Jun Yang, Rajiv Gupta, Chuanjun Zhang. ACM Trans. Design Autom. Electr. Syst. (9): 354-384 (2004). Cited by 17Web SearchBibTeXDownload |
| 6 | Low Static-Power Frequent-Value Data Caches. Chuanjun Zhang, Jun Yang, Frank Vahid. DATE 2004, 214-219. Cited by 16Web SearchBibTeXDownload |
| 5 | A way-halting cache for low-energy high-performance systems. Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar. ISLPED 2004, 126-131. Cited by 37Web SearchBibTeXDownload |
| 2003 |
|---|
| 4 | A Way-Halting Cache for Low-Energy High-Performance Systems. Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar. Computer Architecture Letters (2) (2003). Web SearchBibTeXDownload |
| 3 | FV-MSB: A Scheme for Reducing Transition Activity on Data Buses. Dinesh C. Suresh, Jun Yang, Chuanjun Zhang, Banit Agrawal, Walid A. Najjar. HiPC 2003, 44-54. Web SearchBibTeXDownload |
| 2 | A Highly-Configurable Cache Architecture for Embedded Systems. Chuanjun Zhang, Frank Vahid, Walid A. Najjar. ISCA 2003, 136-146. Web SearchBibTeXDownload |
| 1 | Energy Benefits of a Configurable Line Size Cache for Embedded Systems. Chuanjun Zhang, Frank Vahid, Walid A. Najjar. ISVLSI 2003, 87-91. Web SearchBibTeXDownload |
