Daniel J. Sorin

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2011
19A Primer on Memory Consistency and Cache Coherence. Daniel J. Sorin, Mark D. Hill, David A. Wood. A Primer on Memory Consistency and Cache Coherence 2011. Web SearchBibTeXDownload
2006
18Spin Detection Hardware for Improved Management of Multithreaded Systems. Tong Li, Alvin R. Lebeck, Daniel J. Sorin. IEEE Trans. Parallel Distrib. Syst. (17): 508-521 (2006). Web SearchBibTeXDownload
2005
17Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset. Milo M. K. Martin, Daniel J. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, David A. Wood. SIGARCH Computer Architecture News (33): 92-99 (2005). Web SearchBibTeXDownload
16Pulse: A Dynamic Deadlock Detection Mechanism Using Speculative Execution. Tong Li, Carla Schlatter Ellis, Alvin R. Lebeck, Daniel J. Sorin. USENIX Annual Technical Conference, General Track 2005, 31-44. Web SearchBibTeXDownload
2004
15Using Speculation to Simplify Multiprocessor Design. Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, David A. Wood. IPDPS 2004. Web SearchBibTeXDownload
2003
14Dynamic Verification of End-to-End Multiprocessor Invariants. Daniel J. Sorin, Mark D. Hill, David A. Wood. DSN 2003, 281-290. Web SearchBibTeXDownload
13Simulating a $2M Commercial Server on a $2K PC. Alaa R. Alameldeen, Milo M. K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Mark D. Hill, David A. Wood, Daniel J. Sorin. IEEE Computer (36): 50-57 (2003). Web SearchBibTeXDownload
12Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared-Memory Multiprocessors. Milo M. K. Martin, Pacia J. Harper, Daniel J. Sorin, Mark D. Hill, David A. Wood. ISCA 2003, 206-217. Web SearchBibTeXDownload
11Quantifying instruction criticality for shared memory multiprocessors. Tong Li, Alvin R. Lebeck, Daniel J. Sorin. SPAA 2003, 128-137. Web SearchBibTeXDownload
2002
10Bandwidth Adaptive Snooping. Milo M. K. Martin, Daniel J. Sorin, Mark D. Hill, David A. Wood. HPCA 2002, 251-262. Web SearchBibTeXDownload
9Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol. Daniel J. Sorin, Manoj Plakal, Anne Condon, Mark D. Hill, Milo M. K. Martin, David A. Wood. IEEE Trans. Parallel Distrib. Syst. (13): 556-578 (2002). Web SearchBibTeXDownload
8SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery. Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, David A. Wood. ISCA 2002, 123. Web SearchBibTeXDownload
2001
7Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing. Milo M. K. Martin, Daniel J. Sorin, Harold W. Cain, Mark D. Hill, Mikko H. Lipasti. MICRO 2001, 328-337. Web SearchBibTeXDownload
2000
6Timestamp snooping: an approach for extending SMPs. Milo M. K. Martin, Daniel J. Sorin, Anastassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, David A. Wood. ASPLOS 2000, 25-36. Cited by 36Web SearchBibTeXDownload
1999
5Using Lamport Clocks to Reason about Relaxed Memory Models. Anne Condon, Mark D. Hill, Manoj Plakal, Daniel J. Sorin. HPCA 1999, 270-278. Web SearchBibTeXDownload
4Multicast Snooping: A New Coherence Method Using a Multicast Address Network. E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Plakal, Daniel J. Sorin, Mark D. Hill, David A. Wood. ISCA 1999, 294-304. Web SearchBibTeXDownload
3A System-Level Specification Framework for I/O Architectures. Mark D. Hill, Anne Condon, Manoj Plakal, Daniel J. Sorin. SPAA 1999, 138-147. Web SearchBibTeXDownload
1998
2Analytic Evaluation of Shared-memory Systems with ILP Processors. Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mary K. Vernon, David A. Wood. ISCA 1998, 380-391. Web SearchBibTeXDownload
1Lamport Clocks: Verifying a Directory Cache-Coherence Protocol. Manoj Plakal, Daniel J. Sorin, Anne Condon, Mark D. Hill. SPAA 1998, 67-76. Web SearchBibTeXDownload
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