| 2011 |
| 25 | Pocket cloudlets. Emmanouil Koukoumidis, Dimitrios Lymberopoulos, Karin Strauss, Jie Liu, Doug Burger. ASPLOS 2011, 171-184. Web SearchBibTeXDownload |
| 24 | Panel Statement. Per Stenström, William J. Dally, Jack Dongarra, Vipin Kumar, Robert Schreiber, Horst D. Simon, Uzi Vishkin. IPDPS 2011, 877. Web SearchBibTeXDownload |
| 2010 |
| 23 | Phase-Change Technology and the Future of Main Memory. Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, Doug Burger. IEEE Micro (30): 143 (2010). Web SearchBibTeXDownload |
| 22 | Using dead blocks as a virtual victim cache. Samira Manabi Khan, Daniel A. Jiménez, Doug Burger, Babak Falsafi. PACT 2010, 489-500. Web SearchBibTeXDownload |
| 2008 |
| 21 | Multitasking workload scheduling on flexible-core chip multiprocessors. Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger. PACT 2008, 187-196. Web SearchBibTeXDownload |
| 20 | Multitasking workload scheduling on flexible core chip multiprocessors. Divya Gulati, Changkyu Kim, Simha Sethumadhavan, Stephen W. Keckler, Doug Burger. SIGARCH Computer Architecture News (36): 46-55 (2008). Web SearchBibTeXDownload |
| 2007 |
| 19 | On-Chip Interconnection Networks of the TRIPS Chip. Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger. IEEE Micro (27): 41-50 (2007). Web SearchBibTeXDownload |
| 18 | A NUCA Substrate for Flexible CMP Cache Sharing. Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler. IEEE Trans. Parallel Distrib. Syst. (18): 1028-1040 (2007). Web SearchBibTeXDownload |
| 17 | Composable Lightweight Processors. Changkyu Kim, Simha Sethumadhavan, M. S. Govindan, Nitya Ranganathan, Divya Gulati, Doug Burger, Stephen W. Keckler. MICRO 2007, 381-394. Web SearchBibTeXDownload |
| 2006 |
| 16 | A spatial path scheduling algorithm for EDGE architectures. Katherine E. Coons, Xia Chen, Doug Burger, Kathryn S. McKinley, Sundeep K. Kushwaha. ASPLOS 2006, 129-140. Web SearchBibTeXDownload |
| 15 | Implementation and Evaluation of On-Chip Network Architectures. Paul Gratz, Changkyu Kim, Robert G. McDonald, Stephen W. Keckler, Doug Burger. ICCD 2006. Web SearchBibTeXDownload |
| 14 | Critical path analysis of the TRIPS architecture. Ramadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler. ISPASS 2006, 37-47. Web SearchBibTeXDownload |
| 13 | Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger. MICRO 2006, 480-491. Web SearchBibTeXDownload |
| 2005 |
| 12 | A NUCA substrate for flexible CMP cache sharing. Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhang, Doug Burger, Stephen W. Keckler. ICS 2005, 31-40. Web SearchBibTeXDownload |
| 2004 |
| 11 | Scaling to the End of Silicon with EDGE Architectures. Doug Burger, Stephen W. Keckler, Kathryn S. McKinley, Michael Dahlin, Lizy Kurian John, Calvin Lin, Charles R. Moore, James H. Burrill, Robert G. McDonald, William Yode. IEEE Computer (37): 44-55 (2004). Web SearchBibTeXDownload |
| 10 | Tools for computer architecture research. Doug Burger, Anand Sivasubramaniam. SIGMETRICS Performance Evaluation Review (31): 2-3 (2004). Web SearchBibTeXDownload |
| 9 | TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Nitya Ranganathan, Doug Burger, Stephen W. Keckler, Robert G. McDonald, Charles R. Moore. TACO (1): 62-93 (2004). Web SearchBibTeXDownload |
| 2003 |
| 8 | Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. Changkyu Kim, Doug Burger, Stephen W. Keckler. IEEE Micro (23): 99-107 (2003). Web SearchBibTeXDownload |
| 7 | Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore. IEEE Micro (23): 46-51 (2003). Web SearchBibTeXDownload |
| 6 | Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture. Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore. ISCA 2003, 422-433. Web SearchBibTeXDownload |
| 2002 |
| 5 | An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. Changkyu Kim, Doug Burger, Stephen W. Keckler. ASPLOS 2002, 211-222. Web SearchBibTeXDownload |
| 1997 |
| 4 | Changing Interaction of Compiler and Architecture. Sarita V. Adve, Doug Burger, Rudolf Eigenmann, Alasdair Rawsthorne, Michael D. Smith, Catherine H. Gebotys, Mahmut T. Kandemir, David J. Lilja, Alok N. Choudhary, Jesse Zhixi Fang, Pen-Chung Yew. IEEE Computer (30): 51-58 (1997). Web SearchBibTeXDownload |
| 1996 |
| 3 | Paging tradeoffs in distributed-shared-memory multiprocessors. Doug Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood. The Journal of Supercomputing (10): 87-104 (1996). Web SearchBibTeXDownload |
| 1995 |
| 2 | Accuracy vs. performance in parallel simulation of interconnection networks. Doug Burger, David A. Wood. IPPS 1995, 22-31. Web SearchBibTeXDownload |
| 1994 |
| 1 | Paging tradeoffs in distributed-shared-memory multiprocessors. Doug Burger, Rahmat S. Hyder, Barton P. Miller, David A. Wood. SC 1994, 590-599. Web SearchBibTeXDownload |