Durodami Lisk
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- Sorted by Year/Conf, Year/Citation, Citation
| 2012 | ||
|---|---|---|
| 1 | Electrical Characterization for Intertier Connections and Timing Analysis for 3-D ICs. Xiaoxia Wu, Wei Zhao, Mark Nakamoto, Chandra Nimmagadda, Durodami Lisk, Sam Gu, Riko Radojcic, Matt Nowak, Yuan Xie. IEEE Trans. VLSI Syst. (20): 186-191 (2012). Web SearchBibTeXDownload | |
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