Felice Balarin
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- Sorted by Year/Conf, Year/Citation, Citation
| 2007 | ||
|---|---|---|
| 2 | Assertion-Based Design Exploration of DVS in Network Processor Architectures. Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin. CoRR (abs/0710.4714) (2007). Web SearchBibTeXDownload | |
| 2005 | ||
| 1 | Assertion-Based Design Exploration of DVS in Network Processor Architectures. Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang, Felice Balarin. DATE 2005, 92-97. Web SearchBibTeXDownload | |
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