| 2011 |
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| 14 | Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits. Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob A. Rutenbar, Ronald D. Blanton. IEEE Trans. on CAD of Integrated Circuits and Systems (30): 1814-1827 (2011). Web SearchBibTeXDownload |
| 2010 |
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| 13 | Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation. Wangyang Zhang, Xin Li, Emrah Acar, Frank Liu, Rob A. Rutenbar. ICCAD 2010, 47-54. Web SearchBibTeXDownload |
| 12 | Guest Editors' Introduction: Compact Variability Modeling in Scaled CMOS Design. Yu Cao, Frank Liu. IEEE Design & Test of Computers (27): 6-7 (2010). Web SearchBibTeXDownload |
| 11 | The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis. Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Sarma B. K. Vrudhula, Frank Liu, Yu Cao. IEEE Trans. VLSI Syst. (18): 173-183 (2010). Web SearchBibTeXDownload |
| 10 | Modeling and Analysis of the Nonrectangular Gate Effect for Postlithography Circuit Simulation. Ritu Singhal, Asha Balijepalli, Anupama R. Subramaniam, Chi-Chao Wang, Frank Liu, Sani R. Nassif, Yu Cao. IEEE Trans. VLSI Syst. (18): 666-670 (2010). Web SearchBibTeXDownload |
| 2009 |
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| 9 | Variability analysis under layout pattern-dependent rapid-thermal annealing process. Yun Ye, Frank Liu, Min Chen, Yu Cao. DAC 2009, 551-556. Web SearchBibTeXDownload |
| 8 | Modeling of layout-dependent stress effect in CMOS design. Chi-Chao Wang, Wei Zhao, Frank Liu, Min Chen, Yu Cao. ICCAD 2009, 513-520. Web SearchBibTeXDownload |
| 7 | Finite-Point-Based Transistor Model: A New Approach to Fast Circuit Simulation. Min Chen, Wei Zhao, Frank Liu, Yu Cao. IEEE Trans. VLSI Syst. (17): 1470-1480 (2009). Web SearchBibTeXDownload |
| 2008 |
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| 6 | Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness. Yun Ye, Frank Liu, Sani R. Nassif, Yu Cao. DAC 2008, 900-905. Web SearchBibTeXDownload |
| 2007 |
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| 5 | Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction. Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, Sani R. Nassif. CoRR (abs/0710.4654) (2007). Web SearchBibTeXDownload |
| 4 | The Impact of NBTI on the Performance of Combinational and Sequential Circuits. Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Rakesh Vattikonda, Sarma B. K. Vrudhula, Frank Liu, Yu Cao. DAC 2007, 364-369. Web SearchBibTeXDownload |
| 3 | Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation. Ritu Singhal, Asha Balijepalli, Anupama Subramaniam, Frank Liu, Sani R. Nassif, Yu Cao. DAC 2007, 823-828. Web SearchBibTeXDownload |
| 2 | Fast statistical circuit analysis with finite-point based transistor model. Min Chen, Wei Zhao, Frank Liu, Yu Cao. DATE 2007, 1391-1396. Web SearchBibTeXDownload |
| 2005 |
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| 1 | Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction. Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, Sani R. Nassif. DATE 2005, 958-963. Web SearchBibTeXDownload |
