Rajat Aggarwal
Loading Google Thumbnails...
from Google Images |
- Sorted by Year/Conf, Year/Citation, Citation
| 1999 | ||
|---|---|---|
| 2 | Multilevel hypergraph partitioning: applications in VLSI domain. George Karypis, Rajat Aggarwal, Vipin Kumar, Shashi Shekhar. IEEE Trans. VLSI Syst. (7): 69-79 (1999). Cited by 8Web SearchBibTeXDownload | |
| 1997 | ||
| 1 | Multilevel Hypergraph Partitioning: Application in VLSI Domain. George Karypis, Rajat Aggarwal, Vipin Kumar, Shashi Shekhar. DAC 1997, 526-529. Cited by 719Web SearchBibTeXDownload | |
from DBLP and Google Scholar