2013
56Combinational Logic Design Using Six-Terminal NEM Relays. Daesung Lee, W. Scott Lee, Chen Chen, Farzan Fallah, J. Provine, Soogine Chong, John Watkins, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra. IEEE Trans. on CAD of Integrated Circuits and Systems (32): 653-666 (2013). Web SearchBibTeXDownload
2012
55Nano-Electro-Mechanical (NEM) relays and their application to FPGA routing. Chen Chen, W. Scott Lee, J. Provine, Soogine Chong, Roozbeh Parsa, Daesung Lee, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra. ASP-DAC 2012, 639. Web SearchBibTeXDownload
54Nano-Electro-Mechanical relays for FPGA routing: Experimental demonstration and a design technique. Chen Chen, W. Scott Lee, Roozbeh Parsa, Soogine Chong, J. Provine, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra. DATE 2012, 1361-1366. Web SearchBibTeXDownload
2011
53The case for RAMCloud. John K. Ousterhout, Parag Agrawal, David Erickson, Christos Kozyrakis, Jacob Leverich, David Mazières, Subhasish Mitra, Aravind Narayanan, Diego Ongaro, Guru M. Parulkar, Mendel Rosenblum, Stephen M. Rumble, Eric Stratmann, Ryan Stutsman. Commun. ACM (54): 121-130 (2011). Web SearchBibTeXDownload
52Self-Tuning for Maximized Lifetime Energy-Efficiency in the Presence of Circuit Aging. Evelyn Mintarno, Joëlle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra. IEEE Trans. on CAD of Integrated Circuits and Systems (30): 760-773 (2011). Web SearchBibTeXDownload
51Architecture and performance evaluation of 3D CMOS-NEM FPGA. Chen Dong, Chen Chen, Subhasish Mitra, Deming Chen. SLIP 2011, 1-8. Web SearchBibTeXDownload
2010
50Optimized self-tuning for circuit aging. Evelyn Mintarno, Joelle Skaf, Rui Zheng, Jyothi Velamala, Yu Cao, Stephen P. Boyd, Robert W. Dutton, Subhasish Mitra. DATE 2010, 586-591. Web SearchBibTeXDownload
49Efficient FPGAs using nanoelectromechanical relays. Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra. FPGA 2010, 273-282. Web SearchBibTeXDownload
2009
48Circuit aging prediction for low-power operation. Rui Zheng, Jyothi Velamala, Vijay Reddy, Varsha Balakrishnan, Evelyn Mintarno, Subhasish Mitra, Srikanth Krishnan, Yu Cao. CICC 2009, 427-430. Web SearchBibTeXDownload
47The case for RAMClouds: scalable high-performance storage entirely in DRAM. John K. Ousterhout, Parag Agrawal, David Erickson, Christos Kozyrakis, Jacob Leverich, David Mazières, Subhasish Mitra, Aravind Narayanan, Guru M. Parulkar, Mendel Rosenblum, Stephen M. Rumble, Eric Stratmann, Ryan Stutsman. Operating Systems Review (43): 92-105 (2009). Web SearchBibTeXDownload
2008
46Dependable Embedded Systems Special Day Panel: Issues and Challenges in Dependable Embedded Systems. Neeraj Suri, Christof Fetzer, Jacob Abraham, Stefan Poledna, Avi Mendelson, Subhasish Mitra. DATE 2008, 1394-1395. Web SearchBibTeXDownload
45Optimized Circuit Failure Prediction for Aging: Practicality and Promise. Mridul Agarwal, Varsha Balakrishnan, Anshuman Bhuyan, Kyunglok Kim, Bipul C. Paul, Wenping Wang, Bo Yang, Yu Cao, Subhasish Mitra. ITC 2008, 1-10. Web SearchBibTeXDownload
2007
44California scan architecture for high quality and low power testing. Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey. ITC 2007, 1-10. Web SearchBibTeXDownload
43Circuit Failure Prediction and Its Application to Transistor Aging. Mridul Agarwal, Bipul C. Paul, Ming Zhang, Subhasish Mitra. VTS 2007, 277-286. Web SearchBibTeXDownload
2006
42Sequential Element Design With Built-In Soft Error Resilience. Ming Zhang, Subhasish Mitra, T. M. Mak, Norbert Seifert, N. J. Wang, Quan Shi, Kee Sup Kim, Naresh R. Shanbhag, Sanjay J. Patel. IEEE Trans. VLSI Syst. (14): 1368-1378 (2006). Web SearchBibTeXDownload
41Combinational Logic Soft Error Correction. Subhasish Mitra, Ming Zhang, Saad Waqas, Norbert Seifert, Balkaran S. Gill, Kee Sup Kim. ITC 2006, 1-9. Web SearchBibTeXDownload
40How To Safeguard Your Sensitive Data. Bob Mungamuru, Hector Garcia-Molina, Subhasish Mitra. SRDS 2006, 199-211. Cited by 6Web SearchBibTeXDownload
39Soft Error Resilient System Design through Error Correction. Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim. VLSI-SoC 2006, 332-337. Web SearchBibTeXDownload
2005
38Logic soft errors in sub-65nm technologies design and CAD challenges. Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang. DAC 2005, 2-4. Web SearchBibTeXDownload
37Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim. Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim. IEEE Computer (38): 43-52 (2005). Web SearchBibTeXDownload
36X-Tolerant Test Response Compaction. Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher, Nishant Patil. IEEE Design & Test of Computers (22): 566-574 (2005). Web SearchBibTeXDownload
35Optimized reseeding by seed ordering and encoding. Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey. IEEE Trans. on CAD of Integrated Circuits and Systems (24): 264-270 (2005). Web SearchBibTeXDownload
34DFT Assisted Built-In Soft Error Resilience. T. M. Mak, Subhasish Mitra, Ming Zhang. IOLTS 2005, 69. Web SearchBibTeXDownload
33Logic soft errors: a major barrier to robust platform design. Subhasish Mitra, Ming Zhang, T. M. Mak, Norbert Seifert, Victor Zia, Kee Sup Kim. ITC 2005, 10. Web SearchBibTeXDownload
32Gate exhaustive testing. Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey. ITC 2005, 7. Web SearchBibTeXDownload
2004
31Reconfigurable Architecture for Autonomous Self-Repair. Subhasish Mitra, Wei-Je Huang, Nirmal R. Saxena, Shu-Yi Yu, Edward J. McCluskey. IEEE Design & Test of Computers (21): 228-240 (2004). Web SearchBibTeXDownload
30Conference Reports. Rolf Bernhardt, Sharad C. Seth, Hana Kubatova, Bashir M. Al-Hashimi, Gil Philips, Bozena Kaminska, Bernard Courtois. IEEE Design & Test of Computers (21): 594-595 (2004). Web SearchBibTeXDownload
29Efficient Design Diversity Estimation for Combinational Circuits. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey. IEEE Trans. Computers (53): 1483-1492 (2004). Web SearchBibTeXDownload
28X-Tolerant Signature Analysis. Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher. ITC 2004, 432-441. Web SearchBibTeXDownload
27Speed Clustering of Integrated Circuits. Kenneth A. Brand, Erik H. Volkerink, Edward J. McCluskey, Subhasish Mitra. ITC 2004, 1128-1137. Web SearchBibTeXDownload
26Delay Defect Screening using Process Monitor Structures. Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger. VTS 2004, 43-52. Web SearchBibTeXDownload
25ELF-Murphy Data on Defects and Test Sets. Edward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, François-Fabien Ferhani, Edward Li, Subhasish Mitra. VTS 2004, 16-22. Web SearchBibTeXDownload
2003
24Bist Reseeding with very few Seeds. Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey. VTS 2003, 69-76. Web SearchBibTeXDownload
2002
23Testing Digital Circuits with Constraints. Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey. DFT 2002, 195-206. Web SearchBibTeXDownload
22Dependable Reconfigurable Computing Design Diversity and Self Repair. Subhasish Mitra, Edward J. McCluskey. Evolvable Hardware 2002, 5. Web SearchBibTeXDownload
21ED4I: Error Detection by Diverse Data and Duplicated Instructions. Nahmsuk Oh, Subhasish Mitra, Edward J. McCluskey. IEEE Trans. Computers (51): 180-199 (2002). Web SearchBibTeXDownload
20A Design Diversity Metric and Analysis of Redundant Systems. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey. IEEE Trans. Computers (51): 498-510 (2002). Web SearchBibTeXDownload
19Fault Grading FPGA Interconnect Test Configurations. Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey. ITC 2002, 608-617. Web SearchBibTeXDownload
18Debating the Future of Burn-In. Edward J. McCluskey, Subhasish Mitra, Bob Madge, Peter C. Maxwell, Phil Nigh, Mike Rodgers. VTS 2002, 311-314. Web SearchBibTeXDownload
17Design for Testability and Testing of IEEE 1149.1 Tap Controller. Subhasish Mitra, Edward J. McCluskey, Samy Makar. VTS 2002, 247-252. Web SearchBibTeXDownload
2001
16Fast Run-Time Fault Location in Dependable FPGA-Based Applications. Wei-Je Huang, Subhasish Mitra, Edward J. McCluskey. DFT 2001, 206-214. Web SearchBibTeXDownload
15Techniques for Estimation of Design Diversity for Combinational Logic Circuits. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey. DSN 2001, 25-36. Web SearchBibTeXDownload
14Diversity Techniques for Concurrent Error Detection. Subhasish Mitra, Edward J. McCluskey. ISQED 2001, 249-250. Web SearchBibTeXDownload
13Design Diversity for Concurrent Error Detection in Sequential Logic Circuts. Subhasish Mitra, Edward J. McCluskey. VTS 2001, 178-183. Web SearchBibTeXDownload
12An Evaluation of Pseudo Random Testing for Detecting Real Defects. Chao-Wen Tseng, Subhasish Mitra, Edward J. McCluskey, Scott Davidson. VTS 2001, 404-410. Web SearchBibTeXDownload
11Design of Redundant Systems Protected Against Common-Mode Failures. Subhasish Mitra, Edward J. McCluskey. VTS 2001, 190-197. Web SearchBibTeXDownload
2000
10Dependable Computing and Online Testing in Adaptive and Configurable Systems. Nirmal R. Saxena, Santiago Fernández-Gomez, Wei-Je Huang, Subhasish Mitra, Shu-Yi Yu, Edward J. McCluskey. IEEE Design & Test of Computers (17): 29-41 (2000). Web SearchBibTeXDownload
9Efficient Multiplexer Synthesis Techniques. Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey. IEEE Design & Test of Computers (17): 90-97 (2000). Web SearchBibTeXDownload
8Which concurrent error detection scheme to choose ?. Subhasish Mitra, Edward J. McCluskey. ITC 2000, 985-994. Web SearchBibTeXDownload
7Combinational logic synthesis for diversity in duplex systems. Subhasish Mitra, Edward J. McCluskey. ITC 2000, 179-188. Web SearchBibTeXDownload
6Word Voter: A New Voter Design for Triple Modular Redundant Systems. Subhasish Mitra, Edward J. McCluskey. VTS 2000, 465-470. Web SearchBibTeXDownload
5Fault Escapes in Duplex Systems. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey. VTS 2000, 453-458. Web SearchBibTeXDownload
1999
4An output encoding problem and a solution technique. Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey. IEEE Trans. on CAD of Integrated Circuits and Systems (18): 761-768 (1999). Web SearchBibTeXDownload
3A design diversity metric and reliability analysis for redundant systems. Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey. ITC 1999, 662-671. Web SearchBibTeXDownload
1997
2An output encoding problem and a solution technique. Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey. ICCAD 1997, 304-307. Web SearchBibTeXDownload
1Scan Synthesis for One-Hot Signals. Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey. ITC 1997, 714-722. Web SearchBibTeXDownload
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